1. Field of the Invention
The present invention relates to a reference current generator, and more particularly, to a reference current generator that sums up current sources having different temperature characteristics from each other at one node and generates a reference current.
2. Discussion of Related Art
In an integrated circuit (IC), a reference voltage and a reference current are used during an analog operation of an analog-to-digital converter and so forth, and are essential for reducing circuit variation resulting from process variation and helping the circuit to stably operate even within a wide temperature variation range. A typical example of a conventional reference voltage generation method uses a voltage of a diode (or only one junction of a transistor) biased at a uniform current, and a voltage VT of a thermal voltage generator.
FIG. 1 is a circuit diagram of a conventional reference voltage generator. Referring to FIG. 1, the reference voltage generator comprises a voltage generator 10 including a voltage source that is proportional to temperature and another voltage source that is inversely proportional to temperature, a voltage former 20 forming a uniform voltage level using the voltage generated by the voltage generator 10, and a voltage output 30 connected to the voltage former 20 and outputting a voltage corresponding to the voltage formed by the voltage former 20.
The voltage generator 10 receives a first power supply Vcc and a second power supply Vss, and includes a first line and a second line. The first line includes a first transistor T1, a second transistor T2, a third transistor T3, and a fourth transistor T4 connected in series between the first power supply Vcc and the second power supply Vss, and the second line is connected between the first power supply Vcc and the second power supply Vss like the mirror image of the first line, and includes a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, and an eighth transistor T8 connected in series to one another. The first line is connected to the second power supply Vss through a first bipolar junction transistor Q1, and the second line is connected to the second power supply Vss through a resistor R11 and a second bipolar junction transistor Q2. The first and second bipolar junction transistors Q1 and Q2 are diode-connected. The first, second, fifth, and sixth transistors T1, T2, T5, and T6 are P-channel metal oxide semiconductor (PMOS) transistors, and the third, fourth, seventh, and eighth transistors T3, T4, T7, and T8 are N-channel metal oxide semiconductor (NMOS) transistors.
Gates of the first and second transistors T1 and T2 are connected to gates of the fifth and sixth transistors T5 and T6 respectively in the mirror configuration, and gates of the third and fourth transistors T3 and T4 are connected to gates of the seventh and eighth transistors T7 and T8 respectively in the mirror configuration. The third, fourth, fifth, and sixth transistors T3, T4, T5, and T6 are diode-connected.
When the fifth and sixth transistors T5 and T6 are turned on, since the first and second transistors T1 and T2 are connected to the fifth and sixth transistors T5 and T6 in the mirror configuration, the same current that flows through the fifth and sixth transistors T5 and T6 flows through the first and second transistors T1 and T2. When the first and second transistors T1 and T2 are turned on, the third and fourth transistors T3 and T4 are turned on so that the same current that flows through the third and fourth transistors T3 and T4 flows through the seventh and eighth transistors T7 and T8. Therefore, a first current I1 and a second current I2 of equal magnitude flow through the first line and the second line, respectively, due to mutual current mirror operation.
Here, when the first current I1 flows through the first bipolar transistor Q1 to the second power supply Vss, a temperature around the first bipolar transistor Q1 goes up so that a voltage corresponding to the first current I1 decreases due to semiconductor characteristics of the first bipolar transistor Q1.
When the second current I2 flows through the first resistor R11 and the second bipolar transistor Q2 to the second power supply Vss, a predetermined voltage drop occurs across the first resistor R11.
The voltage drop across the first resistor R11 is described below. Since voltage levels of sources of the fourth and eighth transistors T4 and T8 are the same, voltages applied to the first and second bipolar junction transistors Q1 and Q2 and the first resistor R11 are as shown in Formula 1 according to Kirchhoff's voltage law:Vq1−Vq2−VR11=0  Formula1
Here, Vq1 denotes a voltage across the first bipolar junction transistor Q1, Vq2 denotes a voltage across the second bipolar junction transistor Q2, and VR11 denotes a voltage across the first resistor R11.
Since the bipolar junction transistors are diode-connected, voltages formed at the bipolar junction transistors are as shown in Formula 2:Vq=VT ln(Id/Is)  Formula2
Here, Is denotes a saturated current as a constant, and Id denotes a current flowing through the bipolar junction transistors.
When Formula 2 is inserted into Formula 1, the voltage across the first resistor R11 is given by Formula 3:VR11=VT ln(N)  Formula3
Here, VR11 denotes the voltage of the first resistor R11, and VT denotes a thermal voltage (kT/q), which is proportional to temperature and is about 25.6 mV at normal temperature. N denotes a size ratio of the first and second bipolar junction transistors Q1 and Q2.
Referring to Formula 3, the size ratio of the first and second bipolar junction transistors Q1 and Q2 is adjusted by the voltage applied to the first resistor R11 so that the voltage across the first resistor R11 generated by the second current I2 can be adjusted. However, the voltage of the first resistor R11 is proportional to temperature as shown in Formula 3.
The voltage former 20 includes a third line that is supplied with power from the first power supply Vcc and the second power supply Vss, and has a ninth transistor T9 and a tenth transistor T10 connected in series to each other. In the third line, a third bipolar junction transistor Q3 and a second resistor R12 are connected between the tenth transistor T10 and the second power supply Vss. The third bipolar junction transistor Q3 is diode-connected. Also, a first node N1 that is connected to the voltage output 30 is formed between the tenth transistor T10 and the diode-connected third bipolar junction transistor Q3.
The ninth and tenth transistors T9 and T10 are PMOS transistors. Gates of the ninth and tenth transistors T9 and T10 are connected to the gates of the fifth and sixth transistors T5 and T6 respectively in the mirror configuration so that a third current I3 of the same magnitude as the current flowing through the fifth and sixth transistors T5 and T6 flows through the ninth and tenth transistors T9 and T11.
Here, the third current I3 flows through the second resistor R12 and the diode-connected third bipolar junction transistor Q3 to the second power supply Vss, the second resistor R12 mirrors the voltage of the first resistor R11 in the second line, and the third bipolar junction transistor Q3 closely mirrors the voltage applied to the first bipolar junction transistor Q1 in the first line.
Therefore, the resulting voltage across the second resistor R12 is increased by the surrounding temperature as shown in Formula 1, and the voltage across the third bipolar junction transistor Q3 is decreased by the surrounding temperature like the first bipolar junction transistor Q1. When the voltage decrease and increase perfectly offset each other, voltage variation according to temperature can be reduced.
The method described above is considered to be an effective method of reducing deviation of reference voltage and reference current in response to variation of temperature and process in an IC, and thus widely used. When deviation according to temperature characteristics of general PN junction and temperature of VT are designed to offset one another, a reference voltage of the method has a value of about 1.26 V corresponding to the bandgap of silicon, and thus called a bandgap reference voltage.
In an IC device, a metal-oxide semiconductor field-effect transistor (MOSFET) device has been continuously scaled down in order to improve operating speed, and thus a gate length of the MOSFET device reached 130 μm. Therefore, characteristics of the device are considerably improved, and a power supply voltage has been reduced to 1.2 V so that power consumption can be largely reduced. However, the power supply voltage of 1.2 V is lower than a conventional general reference voltage of 1.26 V. In addition, considering a margin of an operating point of a transistor to output a reference voltage, it is generally essential that the reference power supply voltage decreases to 1.0 V or below. However, with a conventional bandgap reference voltage generator, it is hard to reduce the reference voltage as described above.
In addition, reduction of operating voltage due to scaling of devices causes a signal-to-noise ratio (SNR) of a signal to decrease. This is because noise does not largely decrease compared to an actual signal interval, but rather increases due to a high operating speed and so forth. Due to this effect, a louder noise source exists in a power supply line that supplies power to a circuit, and in result, output noise of the reference voltage generator also increases.